Information for Developers

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Revision as of 22:28, 5 December 2009 by EdwinOlson (Talk | contribs)
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Contents

Subversion Access

The entire repository containing hardware design files, firmware development files, and user libraries can be obtained from our SVN repository:

svn co svn://april.eecs.umich.edu/uorc

Setting up a toolchain

To write firmware for the board, you'll need to install a toolchain and obtain Programming Hardware. The instructions below assume a Linux environment and have been tested on Ubuntu 8.10.

The programmer connects to the uorc via the JTAG header (J2). This connector is not typically populated. If programming and the custom essay only occasionally, the board can be easily programmed without soldering header by holding the pins in the socket. If programming often, it makes sense to solder a 20 pin male shrouded header (0.100"). In either case, please note the orientation of the connector.

libusb

sudo apt-get install libusb-dev

libftdi (v0.16)

wget http://www.intra2net.com/en/developer/libftdi/download/libftdi-0.16.tar.gz
tar -xzvf libftdi-0.16.tar.gz
cd libftdi-0.16
./configure
make
sudo make install
sudo ldconfig

openocd (0.2.0)

wget http://download.berlios.de/openocd/openocd-0.2.0.tar.gz
tar -xzvf openocd-0.2.0.tar.gz 
cd openocd-0.2.0
./configure --enable-ft2232_libftdi
make
sudo make install

openocd (0.3.1, untested)

git clone git://openocd.git.sourceforge.net/gitroot/openocd/openocd
cd openocd
git checkout v0.3.1
./bootstrap
./configure --enable-ft2232_libftdi --enable-maintainer-mode
make
sudo make install

gcc (arm-none-eabi-gcc v4.3.2)

The supported toolchain is the free sourcery g++ lite compiler, specifically version 2008q33-66 for ARM EABI. Note: 2009q1-xxx is known to have issues (now seems to work?).

  1. Download and install the IA32 GNU/Linux TAR package
    wget http://www.codesourcery.com/sgpp/lite/arm/portal/package3686/public/arm-none-eabi/arm-2008q3-66-arm-none-eabi-i686-pc-linux-gnu.tar.bz2
    tar -xjvf arm-2008q3-66-arm-none-eabi-i686-pc-linux-gnu.tar.bz2
    sudo mv arm-2008q3 /opt
    sudo ln -s /opt/arm-2008q3 /opt/arm
    
  2. Add the executables to your PATH variable. For bash, add the following line to the end of your .bashrc file
    export PATH=/opt/arm/bin:$PATH
    

Note that if you are on AMD64, you should install 32 bit libraries:

apt-get install ia32-libs

Building the firmware and flashing the uOrc

You should now be able to compile the uorc source code. There should be lots of output, but no errors.

% cd uorc/firmware/uorc
% make

And now program the uorc using openocd. Note that the uorc/firmware/uorc directory contains the necessary configuration file for openocd.cfg. OpenOCD will not exit: it runs in the background and will accept commands via TCP ports. (Try telneting to localhost 4444 for an openocd command prompt.)

% openocd

OpenOCD should start up, producing output like this:

Open On-Chip Debugger 0.1.0 (2009-04-18-12:32) Release
Info : JTAG tap: lm3s8962.cpu tap/device found: 0x3ba00477 (Manufacturer: 0x23b, Part: 0xba00, Version: 0x3)
Info : JTAG Tap/device matched

From another terminal, run arm-none-eabi-gdb:

% arm-none-eabi-gdb
(gdb) flash

Note that 'flash' is a macro that is defined in the .gdbinit folder in the uorc/firmware/uorc directory.

Troubleshooting: if openocd cannot connect to the board, try lowering the JTAG speed (in openocd.cfg) to 10khz. This is common on brand new boards that have never been programmed. Once programmed for the first time, higher JTAG speeds can be restored.


Debugging application on the uOrc

it is possible to debug your application on the uOrc. you can use GDB (arm-none-eabi-gdb) make sure to compile your code first:

% make

then connect to the uOrc:

% sudo openocd

then from another terminal window, run arm-none-eabi-gdb command:

% ./arm-none-eabi-gdb main.out

then flash your program onto the board:

(gdb) flash

after flashing your program onto the board, you can add breakpoints as you wish:

(gdb) break 'line#'

then reset the target:

(gdb) rr

you'll see this on the screen:

0xfffffffe in ?? ()
requesting target halt and executing a soft reset
target state: halted
target halted due to breakpoint, current mode: Thread 
xPSR: 0x01000000 pc: 0x00000d64

Hardware assisted breakpoint 1 at 0xd66: file main.c, line 251.
init () at main.c:251
251	{

then you can connect to the device:

(gdb) c

Note: using gdb on the uOrc firmware might be challenging because of the multiple threads running on the firmware. putting break points and stepping through the code is not always going to work.